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Searched refs:ArgFlags (Results 1 – 25 of 25) sorted by relevance

/freebsd-10-stable/contrib/llvm/lib/CodeGen/
DCallingConvLower.cpp45 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
46 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
47 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
73 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
74 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeFormalArguments()
91 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in CheckReturn() local
92 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) in CheckReturn()
105 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
106 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this)) { in AnalyzeReturn()
123 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
[all …]
/freebsd-10-stable/contrib/llvm/lib/Target/Hexagon/
DHexagonCallingConvLower.cpp43 ISD::ArgFlagsTy ArgFlags) { in HandleByVal() argument
44 unsigned Align = ArgFlags.getByValAlign(); in HandleByVal()
45 unsigned Size = ArgFlags.getByValSize(); in HandleByVal()
82 ISD::ArgFlagsTy ArgFlags = Ins[i].Flags; in AnalyzeFormalArguments() local
83 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, 0, 0, false)) { in AnalyzeFormalArguments()
118 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeReturn() local
119 if (Fn(i, VT, VT, CCValAssign::Full, ArgFlags, *this, -1, -1, false)){ in AnalyzeReturn()
148 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in AnalyzeCallOperands() local
149 if (Fn(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, *this, in AnalyzeCallOperands()
167 ISD::ArgFlagsTy ArgFlags = Flags[i]; in AnalyzeCallOperands() local
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DHexagonVarargsCallingConvention.h22 ISD::ArgFlagsTy ArgFlags,
31 ISD::ArgFlagsTy ArgFlags, in CC_Hexagon32_VarArgs() argument
37 if (ArgFlags.isByVal() && in CC_Hexagon32_VarArgs()
38 ((ByValSize = ArgFlags.getByValSize()) > in CC_Hexagon32_VarArgs()
84 if (ArgFlags.isByVal()) { in CC_Hexagon32_VarArgs()
100 ISD::ArgFlagsTy ArgFlags, in RetCC_Hexagon32_VarArgs() argument
DHexagonISelLowering.cpp65 ISD::ArgFlagsTy ArgFlags, CCState &State);
70 ISD::ArgFlagsTy ArgFlags, CCState &State);
75 ISD::ArgFlagsTy ArgFlags, CCState &State);
80 ISD::ArgFlagsTy ArgFlags, CCState &State);
85 ISD::ArgFlagsTy ArgFlags, CCState &State);
90 ISD::ArgFlagsTy ArgFlags, CCState &State);
95 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_Hexagon_VarArg() argument
104 return CC_Hexagon(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State); in CC_Hexagon_VarArg()
109 if (ArgFlags.isByVal()) { in CC_Hexagon_VarArg()
112 assert ((ArgFlags.getByValSize() > 8) && in CC_Hexagon_VarArg()
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DHexagonCallingConvLower.h38 ISD::ArgFlagsTy ArgFlags, Hexagon_CCState &State,
177 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/freebsd-10-stable/contrib/llvm/lib/Target/ARM/
DARMCallingConv.h60 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_APCS_Custom_f64() argument
114 ISD::ArgFlagsTy &ArgFlags, in CC_ARM_AAPCS_Custom_f64() argument
146 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_APCS_Custom_f64() argument
157 ISD::ArgFlagsTy &ArgFlags, in RetCC_ARM_AAPCS_Custom_f64() argument
159 return RetCC_ARM_APCS_Custom_f64(ValNo, ValVT, LocVT, LocInfo, ArgFlags, in RetCC_ARM_AAPCS_Custom_f64()
DARMFastISel.cpp212 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1959 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in ProcessCallArgs() argument
1966 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, in ProcessCallArgs()
2283 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in ARMEmitLibcall() local
2287 ArgFlags.reserve(I->getNumOperands()); in ARMEmitLibcall()
2304 ArgFlags.push_back(Flags); in ARMEmitLibcall()
2310 if (!ProcessCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in ARMEmitLibcall()
2394 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
2399 ArgFlags.reserve(arg_size); in SelectCall()
2437 ArgFlags.push_back(Flags); in SelectCall()
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DARMCallingConv.td14 CCIf<!strconcat("ArgFlags.getOrigAlign() == ", Align), A>;
114 CCIfType<[i32], CCIf<"ArgFlags.getOrigAlign() != 8",
/freebsd-10-stable/contrib/llvm/tools/clang/include/clang/Basic/
DIdentifierTable.h609 ArgFlags = ZeroArg|OneArg enumerator
615 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
621 assert((InfoPtr & ArgFlags) == 0 &&"Insufficiently aligned IdentifierInfo"); in Selector()
627 return reinterpret_cast<IdentifierInfo *>(InfoPtr & ~ArgFlags); in getAsIdentifierInfo()
631 return reinterpret_cast<MultiKeywordSelector *>(InfoPtr & ~ArgFlags); in getMultiKeywordSelector()
635 return InfoPtr & ArgFlags; in getIdentifierInfoFlag()
/freebsd-10-stable/contrib/llvm/include/llvm/Target/
DTargetCallingConv.td42 class CCIfByVal<CCAction A> : CCIf<"ArgFlags.isByVal()", A> {
51 class CCIfInReg<CCAction A> : CCIf<"ArgFlags.isInReg()", A> {}
55 class CCIfNest<CCAction A> : CCIf<"ArgFlags.isNest()", A> {}
59 class CCIfSplit<CCAction A> : CCIf<"ArgFlags.isSplit()", A> {}
63 class CCIfSRet<CCAction A> : CCIf<"ArgFlags.isSRet()", A> {}
/freebsd-10-stable/contrib/llvm/include/llvm/CodeGen/
DCallingConvLower.h137 ISD::ArgFlagsTy ArgFlags, CCState &State);
144 ISD::ArgFlagsTy &ArgFlags, CCState &State);
355 int MinSize, int MinAlign, ISD::ArgFlagsTy ArgFlags);
/freebsd-10-stable/contrib/llvm/lib/Target/SystemZ/
DSystemZCallingConv.td13 : CCIf<"ArgFlags.isSExt() || ArgFlags.isZExt()", A>;
/freebsd-10-stable/contrib/llvm/lib/Target/PowerPC/
DPPCISelLowering.h641 ISD::ArgFlagsTy &ArgFlags,
647 ISD::ArgFlagsTy &ArgFlags,
653 ISD::ArgFlagsTy &ArgFlags,
DPPCFastISel.cpp172 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags,
1191 SmallVectorImpl<ISD::ArgFlagsTy> &ArgFlags, in processCallArgs() argument
1198 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_PPC64_ELF_FIS); in processCallArgs()
1409 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in SelectCall() local
1414 ArgFlags.reserve(NumArgs); in SelectCall()
1455 ArgFlags.push_back(Flags); in SelectCall()
1462 if (!processCallArgs(Args, ArgRegs, ArgVTs, ArgFlags, in SelectCall()
DPPCISelLowering.cpp1851 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_Dummy() argument
1859 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignArgRegs() argument
1886 ISD::ArgFlagsTy &ArgFlags, in CC_PPC32_SVR4_Custom_AlignFPArgRegs() argument
3598 ISD::ArgFlagsTy ArgFlags = Outs[i].Flags; in LowerCall_32SVR4() local
3602 Result = CC_PPC32_SVR4(i, ArgVT, ArgVT, CCValAssign::Full, ArgFlags, in LowerCall_32SVR4()
3606 ArgFlags, CCInfo); in LowerCall_32SVR4()
/freebsd-10-stable/contrib/llvm/lib/Target/Mips/
DMipsISelLowering.cpp2125 CCValAssign::LocInfo LocInfo, ISD::ArgFlagsTy ArgFlags, in CC_MipsO32() argument
2134 if (ArgFlags.isByVal()) in CC_MipsO32()
2140 if (ArgFlags.isSExt()) in CC_MipsO32()
2142 else if (ArgFlags.isZExt()) in CC_MipsO32()
2155 unsigned OrigAlign = ArgFlags.getOrigAlign(); in CC_MipsO32()
2202 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP32() argument
2205 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP32()
2210 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_MipsO32_FP64() argument
2213 return CC_MipsO32(ValNo, ValVT, LocVT, LocInfo, ArgFlags, State, F64Regs); in CC_MipsO32_FP64()
3249 ISD::ArgFlagsTy ArgFlags = Args[I].Flags; in analyzeCallOperands() local
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DMipsISelLowering.h390 ISD::ArgFlagsTy ArgFlags);
/freebsd-10-stable/contrib/llvm/lib/Target/R600/
DAMDGPUCallingConv.td15 class CCIfNotInReg<CCAction A> : CCIf<"!ArgFlags.isInReg()", A> {}
DAMDGPUISelLowering.cpp34 ISD::ArgFlagsTy ArgFlags, CCState &State) { in allocateStack() argument
35 unsigned Offset = State.AllocateStack(ValVT.getSizeInBits() / 8, ArgFlags.getOrigAlign()); in allocateStack()
/freebsd-10-stable/contrib/llvm/lib/Target/MSP430/
DMSP430ISelLowering.cpp306 ISD::ArgFlagsTy ArgFlags = Args[ValNo].Flags; in AnalyzeArguments() local
313 if (ArgFlags.isSExt()) in AnalyzeArguments()
315 else if (ArgFlags.isZExt()) in AnalyzeArguments()
322 if (ArgFlags.isByVal()) { in AnalyzeArguments()
323 State.HandleByVal(ValNo++, ArgVT, LocVT, LocInfo, 2, 2, ArgFlags); in AnalyzeArguments()
344 CC_MSP430_AssignStack(ValNo++, ArgVT, LocVT, LocInfo, ArgFlags, State); in AnalyzeArguments()
/freebsd-10-stable/contrib/llvm/patches/
Dpatch-r262261-llvm-r198145-sparc.diff53 ISD::ArgFlagsTy &ArgFlags, CCState &State) {
/freebsd-10-stable/contrib/llvm/lib/Target/X86/
DX86FastISel.cpp1938 SmallVector<ISD::ArgFlagsTy, 8> ArgFlags; in DoSelectCall() local
1943 ArgFlags.reserve(arg_size); in DoSelectCall()
2024 ArgFlags.push_back(Flags); in DoSelectCall()
2036 CCInfo.AnalyzeCallOperands(ArgVTs, ArgFlags, CC_X86); in DoSelectCall()
2121 ISD::ArgFlagsTy Flags = ArgFlags[VA.getValNo()]; in DoSelectCall()
/freebsd-10-stable/contrib/llvm/lib/Target/Sparc/
DSparcISelLowering.cpp41 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_SRet() argument
43 assert (ArgFlags.isSRet()); in CC_Sparc_Assign_SRet()
54 ISD::ArgFlagsTy &ArgFlags, CCState &State) in CC_Sparc_Assign_f64() argument
83 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Full() argument
128 ISD::ArgFlagsTy &ArgFlags, CCState &State) { in CC_Sparc64_Half() argument
/freebsd-10-stable/contrib/llvm/lib/Target/AArch64/
DAArch64CallingConv.td47 CCIf<"ArgFlags.getOrigAlign() == " # Align, A>;
DAArch64ISelLowering.cpp1034 ISD::ArgFlagsTy ArgFlags, CCState &State) { in CC_AArch64NoMoreRegs() argument