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Searched refs:AR_PHY_BB_DPLL2 (Results 1 – 2 of 2) sorted by relevance

/freebsd-10-stable/sys/contrib/dev/ath/ath_hal/ar9300/
Dar9300_reset.c1378 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1380 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1406 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1408 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1418 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, AR_PHY_BB_DPLL2_PLL_PWD, 0x1); in ar9300_init_pll()
1421 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1423 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1433 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1435 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
1437 OS_REG_RMW_FIELD(ah, AR_PHY_BB_DPLL2, in ar9300_init_pll()
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Dar9300phy.h1833 #define AR_PHY_BB_DPLL2 AR_PHY_65NM(overlay_0x16180.Poseidon.ch0_BB_DPLL2) macro