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Searched refs:write_reg (Results 1 – 16 of 16) sorted by relevance

/dragonfly/sys/dev/netif/ig_hal/
HDe1000_82541.c105 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_82541()
710 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
741 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
765 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change_82541()
771 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
785 ret_val = phy->ops.write_reg(hw, in e1000_config_dsp_after_link_change_82541()
792 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
800 ret_val = phy->ops.write_reg(hw, 0x2F5B, in e1000_config_dsp_after_link_change_82541()
822 ret_val = phy->ops.write_reg(hw, 0x2F5B, 0x0003); in e1000_config_dsp_after_link_change_82541()
828 ret_val = phy->ops.write_reg(hw, 0x0000, in e1000_config_dsp_after_link_change_82541()
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HDe1000_phy.c93 phy->ops.write_reg = e1000_null_write_reg; in e1000_init_phy_ops_generic()
271 if (!hw->phy.ops.write_reg) in e1000_phy_reset_dsp_generic()
274 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xC1); in e1000_phy_reset_dsp_generic()
278 return hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0); in e1000_phy_reset_dsp_generic()
1045 return hw->phy.ops.write_reg(hw, PHY_1000T_CTRL, phy_data); in e1000_set_master_slave_mode()
1079 ret_val = hw->phy.ops.write_reg(hw, I82577_CFG_REG, phy_data); in e1000_copper_link_setup_82577()
1104 ret_val = hw->phy.ops.write_reg(hw, I82577_PHY_CTRL_2, phy_data); in e1000_copper_link_setup_82577()
1176 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
1191 ret_val = phy->ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, phy_data); in e1000_copper_link_setup_m88()
1220 ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, in e1000_copper_link_setup_m88()
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HDe1000_82575.c206 phy->ops.write_reg = e1000_write_phy_reg_sgmii_82575; in e1000_init_phy_params_82575()
213 phy->ops.write_reg = e1000_write_phy_reg_82580; in e1000_init_phy_params_82575()
218 phy->ops.write_reg = e1000_write_phy_reg_gs40g; in e1000_init_phy_params_82575()
222 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_82575()
256 ret_val = phy->ops.write_reg(hw, in e1000_init_phy_params_82575()
776 if (!(hw->phy.ops.write_reg)) in e1000_phy_hw_reset_sgmii_82575()
783 ret_val = hw->phy.ops.write_reg(hw, 0x1B, 0x8084); in e1000_phy_hw_reset_sgmii_82575()
827 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
836 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82575()
842 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82575()
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HDe1000_82540.c84 phy->ops.write_reg = e1000_write_phy_reg_m88; in e1000_init_phy_params_82540()
435 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_SPEC_CTRL, in e1000_setup_copper_link_82540()
513 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_EXT_CTRL, in e1000_adjust_serdes_amplitude_82540()
544 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0005); in e1000_set_vco_speed_82540()
553 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
559 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0004); in e1000_set_vco_speed_82540()
568 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, phy_data); in e1000_set_vco_speed_82540()
572 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_vco_speed_82540()
605 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, in e1000_set_phy_mode_82540()
611 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, in e1000_set_phy_mode_82540()
HDe1000_80003es2lan.c122 phy->ops.write_reg = e1000_write_phy_reg_gg82563_80003es2lan; in e1000_init_phy_params_80003es2lan()
681 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
696 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, phy_data); in e1000_phy_force_speed_duplex_80003es2lan()
744 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, in e1000_phy_force_speed_duplex_80003es2lan()
1058 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_MAC_SPEC_CTRL, data); in e1000_copper_link_setup_gg82563_80003es2lan()
1098 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL, data); in e1000_copper_link_setup_gg82563_80003es2lan()
1131 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_SPEC_CTRL_2, data); in e1000_copper_link_setup_gg82563_80003es2lan()
1150 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, in e1000_copper_link_setup_gg82563_80003es2lan()
1161 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_KMRN_MODE_CTRL, in e1000_copper_link_setup_gg82563_80003es2lan()
1175 ret_val = hw->phy.ops.write_reg(hw, GG82563_PHY_INBAND_CTRL, data); in e1000_copper_link_setup_gg82563_80003es2lan()
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HDe1000_82543.c114 phy->ops.write_reg = (hw->mac.type == e1000_82543) in e1000_init_phy_params_82543()
770 if (!(hw->phy.ops.write_reg)) in e1000_polarity_reversal_workaround_82543()
777 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround_82543()
780 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFFF); in e1000_polarity_reversal_workaround_82543()
784 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround_82543()
816 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0019); in e1000_polarity_reversal_workaround_82543()
820 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFFF0); in e1000_polarity_reversal_workaround_82543()
824 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0xFF00); in e1000_polarity_reversal_workaround_82543()
828 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_GEN_CONTROL, 0x0000); in e1000_polarity_reversal_workaround_82543()
832 ret_val = hw->phy.ops.write_reg(hw, M88E1000_PHY_PAGE_SELECT, 0x0000); in e1000_polarity_reversal_workaround_82543()
HDe1000_ich8lan.c471 phy->ops.write_reg = e1000_write_phy_reg_hv; in e1000_init_phy_params_pchlan()
561 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_ich8lan()
570 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
612 phy->ops.write_reg = e1000_write_phy_reg_bm; in e1000_init_phy_params_ich8lan()
1074 ret_val = hw->phy.ops.write_reg(hw, I217_INBAND_CTRL, reg); in e1000_k1_workaround_lpt_lp()
1772 hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg); in e1000_check_for_copper_link_ich8lan()
2602 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_MODE_CTRL, data); in e1000_set_mdio_slow_mode_hv()
2633 ret_val = hw->phy.ops.write_reg(hw, PHY_REG(769, 25), 0x4431); in e1000_hv_phy_workarounds_ich8lan()
2638 ret_val = hw->phy.ops.write_reg(hw, HV_KMRN_FIFO_CTRLSTA, in e1000_hv_phy_workarounds_ich8lan()
2650 ret_val = hw->phy.ops.write_reg(hw, PHY_CONTROL, in e1000_hv_phy_workarounds_ich8lan()
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HDe1000_i210.c862 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, dev_addr); in __e1000_access_xmdio_reg()
866 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, address); in __e1000_access_xmdio_reg()
870 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, E1000_MMDAC_FUNC_DATA | in __e1000_access_xmdio_reg()
878 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAAD, *data); in __e1000_access_xmdio_reg()
883 ret_val = hw->phy.ops.write_reg(hw, E1000_MMDAC, 0); in __e1000_access_xmdio_reg()
HDe1000_82571.c127 phy->ops.write_reg = e1000_write_phy_reg_igp; in e1000_init_phy_params_82571()
140 phy->ops.write_reg = e1000_write_phy_reg_m88; in e1000_init_phy_params_82571()
154 phy->ops.write_reg = e1000_write_phy_reg_bm2; in e1000_init_phy_params_82571()
997 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82571()
1008 ret_val = phy->ops.write_reg(hw, IGP01E1000_PHY_PORT_CONFIG, in e1000_set_d0_lplu_state_82571()
1014 ret_val = phy->ops.write_reg(hw, IGP02E1000_PHY_POWER_MGMT, in e1000_set_d0_lplu_state_82571()
1029 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82571()
1042 ret_val = phy->ops.write_reg(hw, in e1000_set_d0_lplu_state_82571()
HDe1000_api.c1034 if (hw->phy.ops.write_reg) in e1000_write_phy_reg()
1035 return hw->phy.ops.write_reg(hw, offset, data); in e1000_write_phy_reg()
HDe1000_hw.h785 s32 (*write_reg)(struct e1000_hw *, u32, u16); member
/dragonfly/sys/dev/netif/ix/
HDixgbe_phy.c262 phy->ops.write_reg = ixgbe_write_phy_reg_generic; in ixgbe_init_phy_ops_generic()
527 hw->phy.ops.write_reg(hw, IXGBE_MDIO_PHY_XS_CONTROL, in ixgbe_reset_phy_generic()
811 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_generic()
840 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_VENDOR_PROVISION_1_REG, in ixgbe_setup_phy_link_generic()
855 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_generic()
869 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, in ixgbe_setup_phy_link_generic()
1060 hw->phy.ops.write_reg(hw, IXGBE_MII_10GBASE_T_AUTONEG_CTRL_REG, in ixgbe_setup_phy_link_tnx()
1075 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_XNP_TX_REG, in ixgbe_setup_phy_link_tnx()
1090 hw->phy.ops.write_reg(hw, IXGBE_MII_AUTONEG_ADVERTISE_REG, in ixgbe_setup_phy_link_tnx()
1105 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_CONTROL, in ixgbe_setup_phy_link_tnx()
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HDixgbe_x550.c504 hw->phy.ops.write_reg = NULL; in ixgbe_identify_phy_fw()
2074 status = hw->phy.ops.write_reg(hw, in ixgbe_enable_lasi_ext_t_x550em()
2093 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_MASK, in ixgbe_enable_lasi_ext_t_x550em()
2111 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_VEN_MASK, in ixgbe_enable_lasi_ext_t_x550em()
2128 status = hw->phy.ops.write_reg(hw, IXGBE_MDIO_GLOBAL_INT_CHIP_STD_MASK, in ixgbe_enable_lasi_ext_t_x550em()
2294 hw->phy.ops.write_reg = NULL; in ixgbe_init_phy_ops_X550em()
2305 hw->phy.ops.write_reg = ixgbe_write_phy_reg_x550a; in ixgbe_init_phy_ops_X550em()
2338 phy->ops.write_reg = ixgbe_write_phy_reg_x550em; in ixgbe_init_phy_ops_X550em()
2343 phy->ops.write_reg = ixgbe_write_phy_reg_x550em; in ixgbe_init_phy_ops_X550em()
2354 phy->ops.write_reg = ixgbe_write_phy_reg_x550em; in ixgbe_init_phy_ops_X550em()
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HDixgbe_api.c553 return ixgbe_call_func(hw, hw->phy.ops.write_reg, (hw, reg_addr, in ixgbe_write_phy_reg()
HDixgbe_type.h4007 s32 (*write_reg)(struct ixgbe_hw *, u32, u32, u16); member
HDixgbe_common.c375 hw->phy.ops.write_reg(hw, IXGBE_MDIO_AUTO_NEG_ADVT, in ixgbe_setup_fc_generic()