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Searched refs:shifts (Results 1 – 25 of 72) sorted by relevance

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/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_dpp_cm.c149 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_GAMUT_REMAP_C11; in program_gamut_remap()
151 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_GAMUT_REMAP_C12; in program_gamut_remap()
244 gam_regs.shifts.csc_c11 = dpp->tf_shift->CM_OCSC_C11; in dpp1_cm_program_color_matrix()
246 gam_regs.shifts.csc_c12 = dpp->tf_shift->CM_OCSC_C12; in dpp1_cm_program_color_matrix()
291 reg->shifts.exp_region0_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_LUT_OFFSET; in dpp1_cm_get_reg_field()
293 … reg->shifts.exp_region0_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION0_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
295 reg->shifts.exp_region1_lut_offset = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_LUT_OFFSET; in dpp1_cm_get_reg_field()
297 … reg->shifts.exp_region1_num_segments = dpp->tf_shift->CM_RGAM_RAMA_EXP_REGION1_NUM_SEGMENTS; in dpp1_cm_get_reg_field()
300 reg->shifts.field_region_end = dpp->tf_shift->CM_RGAM_RAMB_EXP_REGION_END_B; in dpp1_cm_get_reg_field()
302 reg->shifts.field_region_end_slope = dpp->tf_shift->CM_RGAM_RAMB_EXP_REGION_END_SLOPE_B; in dpp1_cm_get_reg_field()
[all …]
HDdcn10_cm_common.h54 struct xfer_func_shift shifts; member
82 struct cm_color_matrix_shift shifts; member
/dragonfly/sys/contrib/dev/ath/ath_hal/ar9300/
HDar9300_gpio.c428 u_int32_t regs[2], shifts[2]; in ar9300_gpio_set_intr() local
438 shifts[0] = AR_INTR_ASYNC_ENABLE_GPIO_S; in ar9300_gpio_set_intr()
439 shifts[1] = AR_INTR_ASYNC_MASK_GPIO_S; in ar9300_gpio_set_intr()
443 shifts[0] = AR_INTR_SYNC_ENABLE_GPIO_S; in ar9300_gpio_set_intr()
444 shifts[1] = AR_INTR_SYNC_MASK_GPIO_S; in ar9300_gpio_set_intr()
462 reg_bit = shifts[i] + gpio; in ar9300_gpio_set_intr()
468 field_val = (reg_val >> shifts[i]) & gpio_mask; in ar9300_gpio_set_intr()
489 reg_bit = shifts[i] + gpio; in ar9300_gpio_set_intr()
495 field_val = (reg_val >> shifts[i]) & gpio_mask; in ar9300_gpio_set_intr()
/dragonfly/lib/libcrypt/
HDcrypt-des.c370 int shifts, round; in des_setkey() local
414 shifts = 0; in des_setkey()
418 shifts += key_shifts[round]; in des_setkey()
420 t0 = (k0 << shifts) | (k0 >> (28 - shifts)); in des_setkey()
421 t1 = (k1 << shifts) | (k1 >> (28 - shifts)); in des_setkey()
/dragonfly/contrib/byacc/
HDdefs.h247 typedef struct shifts shifts; typedef
248 struct shifts struct
250 struct shifts *next; argument
392 extern shifts *first_shift;
396 extern shifts **shift_table;
HDlr0.c21 shifts *first_shift;
27 static shifts *last_shift;
384 shifts *p; in show_shifts()
404 shifts *p; in save_shifts()
409 p = (shifts *)allocate((sizeof(shifts) + in save_shifts()
HDlalr.c35 shifts **shift_table;
94 shifts *sp; in set_shift_table()
96 shift_table = NEW2(nstates, shifts *); in set_shift_table()
179 shifts *sp; in set_goto_map()
279 shifts *sp; in initialize_F()
357 shifts *sp; in build_relations()
HDverbose.c251 shifts *sp; in print_actions()
349 shifts *sp; in print_gotos()
HDmkpar.c77 shifts *sp; in get_shifts()
175 shifts *p; in find_final_state()
HDgraph.c15 shifts *sp; in graph()
/dragonfly/contrib/cvs-1.12/src/
HDscramble.c53 shifts[] = { variable
102 s[i] = shifts[(unsigned char)(s[i])]; in scramble()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce110/
HDhw_factory_dce110.c130 ddc->shifts = &ddc_shift; in define_ddc_registers()
140 hpd->shifts = &hpd_shift; in define_hpd_registers()
/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_audio.h120 const struct dce_audio_shift *shifts; member
128 const struct dce_audio_shift *shifts,
HDdce_audio.c44 aud->shifts->field_name, aud->masks->field_name
939 const struct dce_audio_shift *shifts, in dce_audio_create() argument
955 audio->shifts = shifts; in dce_audio_create()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce80/
HDhw_factory_dce80.c134 ddc->shifts = &ddc_shift; in define_ddc_registers()
144 hpd->shifts = &hpd_shift; in define_hpd_registers()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dcn10/
HDhw_factory_dcn10.c144 ddc->shifts = &ddc_shift; in define_ddc_registers()
154 hpd->shifts = &hpd_shift; in define_hpd_registers()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/dce120/
HDhw_factory_dce120.c149 ddc->shifts = &ddc_shift; in define_ddc_registers()
159 hpd->shifts = &hpd_shift; in define_hpd_registers()
/dragonfly/contrib/gcc-4.7/gcc/config/i386/
HDconstraints.md137 "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
142 "Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
159 "0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
170 "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."
/dragonfly/crypto/libressl/crypto/bn/
HDbn_gcd.c180 int shifts = 0; in euclid() local
229 shifts++; in euclid()
235 if (shifts) { in euclid()
236 if (!BN_lshift(a, a, shifts)) in euclid()
/dragonfly/sys/dev/drm/amd/display/dc/gpio/
HDhw_hpd.h34 const struct hpd_sh_mask *shifts; member
HDhw_ddc.h34 const struct ddc_sh_mask *shifts; member
HDhw_hpd.c37 hpd->shifts->field_name, hpd->masks->field_name
/dragonfly/contrib/gcc-8.0/gcc/
HDtree-vect-generic.c439 int *shifts = XALLOCAVEC (int, nunits * 4); in expand_vector_divmod() local
440 int *pre_shifts = shifts + nunits; in expand_vector_divmod()
480 shifts[i] = tree_log2 (cst); in expand_vector_divmod()
481 if (shifts[i] != shifts[0] in expand_vector_divmod()
624 if (shifts[i] == 0) in expand_vector_divmod()
639 shift_temps[i] = prec - shifts[i]; in expand_vector_divmod()
659 << shifts[i]) - 1)); in expand_vector_divmod()
672 cur_op = add_rshift (gsi, type, op0, shifts); in expand_vector_divmod()
685 cur_op = add_rshift (gsi, type, cur_op, shifts); in expand_vector_divmod()
698 << shifts[i]) - 1)); in expand_vector_divmod()
/dragonfly/contrib/bzip2/
HDblocksort.c992 Int32 shifts = 0; in mainSort() local
994 while ((bbSize >> shifts) > 65534) shifts++; in mainSort()
998 UInt16 qVal = (UInt16)(j >> shifts); in mainSort()
1003 AssertH ( ((bbSize-1) >> shifts) <= 65535, 1002 ); in mainSort()
/dragonfly/contrib/gcc-8.0/gcc/config/i386/
HDconstraints.md249 "Integer constant in the range 0 @dots{} 31, for 32-bit shifts."
254 "Integer constant in the range 0 @dots{} 63, for 64-bit shifts."
271 "0, 1, 2, or 3 (shifts for the @code{lea} instruction)."
282 "@internal Integer constant in the range 0 @dots{} 127, for 128-bit shifts."

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