Home
last modified time | relevance | path

Searched refs:ref_divider (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_clock_source.c128 uint32_t ref_divider, in calculate_fb_and_fractional_fb_divider() argument
136 (uint64_t)target_pix_clk_khz * ref_divider * post_divider; in calculate_fb_and_fractional_fb_divider()
187 uint32_t ref_divider, in calc_fb_divider_checking_tolerance() argument
200 ref_divider, in calc_fb_divider_checking_tolerance()
212 ref_divider * post_divider * in calc_fb_divider_checking_tolerance()
227 pll_settings->reference_divider = ref_divider; in calc_fb_divider_checking_tolerance()
249 uint32_t ref_divider; in calc_pll_dividers_in_range() local
265 ref_divider = min_ref_divider; in calc_pll_dividers_in_range()
266 ref_divider <= max_ref_divider; in calc_pll_dividers_in_range()
267 ++ref_divider) { in calc_pll_dividers_in_range()
[all …]
/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
HDfiji_smumgr.c878 uint32_t ref_divider; in fiji_calculate_sclk_params() local
891 ref_divider = 1 + dividers.uc_pll_ref_div; in fiji_calculate_sclk_params()
924 (ref_divider * ssInfo.speed_spectrum_rate); in fiji_calculate_sclk_params()
HDci_smumgr.c306 uint32_t ref_divider; in ci_calculate_sclk_params() local
319 ref_divider = 1 + dividers.uc_pll_ref_div; in ci_calculate_sclk_params()
346 (ref_divider * ss_info.speed_spectrum_rate); in ci_calculate_sclk_params()