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Searched refs:mmTD_CNTL (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1639 #define mmTD_CNTL 0x2525 macro
HDgfx_7_0_d.h2071 #define mmTD_CNTL 0x2525 macro
HDgfx_7_2_d.h2092 #define mmTD_CNTL 0x2525 macro
HDgfx_8_0_d.h2283 #define mmTD_CNTL 0x2525 macro
HDgfx_8_1_d.h2262 #define mmTD_CNTL 0x2525 macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgfx_v9_0.c122 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x00001800, 0x00000800),
138 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01000000, 0x01000000)
174 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x00000800)
214 SOC15_REG_GOLDEN_VALUE(GC, 0, mmTD_CNTL, 0x01bd9f33, 0x01000000)
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h828 #define mmTD_CNTL macro
HDgc_9_2_1_offset.h778 #define mmTD_CNTL macro
HDgc_9_1_offset.h802 #define mmTD_CNTL macro