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Searched refs:mmSPI_PS_IN_CONTROL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1218 #define mmSPI_PS_IN_CONTROL 0xA1B6 macro
HDgfx_7_0_d.h1397 #define mmSPI_PS_IN_CONTROL 0xa1b6 macro
HDgfx_7_2_d.h1414 #define mmSPI_PS_IN_CONTROL 0xa1b6 macro
HDgfx_8_0_d.h1593 #define mmSPI_PS_IN_CONTROL 0xa1b6 macro
HDgfx_8_1_d.h1561 #define mmSPI_PS_IN_CONTROL 0xa1b6 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h3871 #define mmSPI_PS_IN_CONTROL … macro
HDgc_9_2_1_offset.h4110 #define mmSPI_PS_IN_CONTROL … macro
HDgc_9_1_offset.h4158 #define mmSPI_PS_IN_CONTROL … macro