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Searched refs:mmSPI_PS_INPUT_CNTL_28 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1241 #define mmSPI_PS_INPUT_CNTL_28 0xA1AD macro
HDgfx_7_0_d.h1389 #define mmSPI_PS_INPUT_CNTL_28 0xa1ad macro
HDgfx_7_2_d.h1406 #define mmSPI_PS_INPUT_CNTL_28 0xa1ad macro
HDgfx_8_0_d.h1585 #define mmSPI_PS_INPUT_CNTL_28 0xa1ad macro
HDgfx_8_1_d.h1553 #define mmSPI_PS_INPUT_CNTL_28 0xa1ad macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h3855 #define mmSPI_PS_INPUT_CNTL_28 … macro
HDgc_9_2_1_offset.h4094 #define mmSPI_PS_INPUT_CNTL_28 … macro
HDgc_9_1_offset.h4142 #define mmSPI_PS_INPUT_CNTL_28 … macro