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Searched refs:mmSPI_GDBG_TRAP_CONFIG (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1421 #define mmSPI_GDBG_TRAP_CONFIG 0x31d2 macro
HDgfx_7_2_d.h1438 #define mmSPI_GDBG_TRAP_CONFIG 0x31d2 macro
HDgfx_8_0_d.h1617 #define mmSPI_GDBG_TRAP_CONFIG 0x31d2 macro
HDgfx_8_1_d.h1585 #define mmSPI_GDBG_TRAP_CONFIG 0x31d2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2655 #define mmSPI_GDBG_TRAP_CONFIG … macro
HDgc_9_2_1_offset.h2898 #define mmSPI_GDBG_TRAP_CONFIG … macro