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Searched refs:mmSPI_COMPUTE_WF_CTX_SAVE (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h1659 #define mmSPI_COMPUTE_WF_CTX_SAVE 0x31fc macro
HDgfx_8_1_d.h1627 #define mmSPI_COMPUTE_WF_CTX_SAVE 0x31fc macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2735 #define mmSPI_COMPUTE_WF_CTX_SAVE … macro
HDgc_9_2_1_offset.h2976 #define mmSPI_COMPUTE_WF_CTX_SAVE … macro
HDgc_9_1_offset.h3020 #define mmSPI_COMPUTE_WF_CTX_SAVE … macro