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Searched refs:mmSPI_CDBG_SYS_GFX (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1406 #define mmSPI_CDBG_SYS_GFX 0x31c3 macro
HDgfx_7_2_d.h1423 #define mmSPI_CDBG_SYS_GFX 0x31c3 macro
HDgfx_8_0_d.h1602 #define mmSPI_CDBG_SYS_GFX 0x31c3 macro
HDgfx_8_1_d.h1570 #define mmSPI_CDBG_SYS_GFX 0x31c3 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2625 #define mmSPI_CDBG_SYS_GFX … macro
HDgc_9_2_1_offset.h2868 #define mmSPI_CDBG_SYS_GFX … macro