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Searched refs:mmSPI_ARB_CYCLES_0 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1190 #define mmSPI_ARB_CYCLES_0 0x243D macro
HDgfx_7_0_d.h1404 #define mmSPI_ARB_CYCLES_0 0x31c1 macro
HDgfx_7_2_d.h1421 #define mmSPI_ARB_CYCLES_0 0x31c1 macro
HDgfx_8_0_d.h1600 #define mmSPI_ARB_CYCLES_0 0x31c1 macro
HDgfx_8_1_d.h1568 #define mmSPI_ARB_CYCLES_0 0x31c1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2621 #define mmSPI_ARB_CYCLES_0 … macro
HDgc_9_2_1_offset.h2864 #define mmSPI_ARB_CYCLES_0 … macro
HDgc_9_1_offset.h2930 #define mmSPI_ARB_CYCLES_0 … macro