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Searched refs:mmSMU_RLC_RESPONSE (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h1350 #define mmSMU_RLC_RESPONSE 0xec07 macro
HDgfx_8_1_d.h1352 #define mmSMU_RLC_RESPONSE 0xec07 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5909 #define mmSMU_RLC_RESPONSE … macro
HDgc_9_2_1_offset.h6152 #define mmSMU_RLC_RESPONSE … macro
HDgc_9_1_offset.h6188 #define mmSMU_RLC_RESPONSE … macro