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Searched refs:mmRLC_SPM_PERFMON_RING_BASE_HI (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1333 #define mmRLC_SPM_PERFMON_RING_BASE_HI 0xdc82 macro
HDgfx_7_2_d.h1346 #define mmRLC_SPM_PERFMON_RING_BASE_HI 0xdc82 macro
HDgfx_8_0_d.h1492 #define mmRLC_SPM_PERFMON_RING_BASE_HI 0xdc82 macro
HDgfx_8_1_d.h1495 #define mmRLC_SPM_PERFMON_RING_BASE_HI 0xdc82 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5769 #define mmRLC_SPM_PERFMON_RING_BASE_HI … macro
HDgc_9_2_1_offset.h6016 #define mmRLC_SPM_PERFMON_RING_BASE_HI … macro
HDgc_9_1_offset.h6056 #define mmRLC_SPM_PERFMON_RING_BASE_HI … macro