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Searched refs:mmRLC_PERFCOUNTER0_SELECT (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1159 #define mmRLC_PERFCOUNTER0_SELECT 0x30DA macro
HDgfx_7_0_d.h1249 #define mmRLC_PERFCOUNTER0_SELECT 0xdcc1 macro
HDgfx_7_2_d.h1262 #define mmRLC_PERFCOUNTER0_SELECT 0xdcc1 macro
HDgfx_8_0_d.h1356 #define mmRLC_PERFCOUNTER0_SELECT 0xdcc1 macro
HDgfx_8_1_d.h1359 #define mmRLC_PERFCOUNTER0_SELECT 0xdcc1 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5837 #define mmRLC_PERFCOUNTER0_SELECT macro
HDgc_9_2_1_offset.h6080 #define mmRLC_PERFCOUNTER0_SELECT macro
HDgc_9_1_offset.h6116 #define mmRLC_PERFCOUNTER0_SELECT macro