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Searched refs:mmRLC_CGTT_MGCG_OVERRIDE (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
HDmxgpu_vi.c48 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
139 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
HDgfx_v8_0.c227 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
430 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
501 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
597 mmRLC_CGTT_MGCG_OVERRIDE, 0xffffffff, 0xffffffff,
5740 data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_get_clockgating_state()
5904 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5916 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5945 temp = data = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_medium_grain_clock_gating()
5951 WREG32(mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v8_0_update_medium_grain_clock_gating()
5999 temp1 = data1 = RREG32(mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v8_0_update_coarse_grain_clock_gating()
[all …]
HDgfx_v9_0.c3554 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
3567 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
3588 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_medium_grain_clock_gating()
3599 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_medium_grain_clock_gating()
3627 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_3d_clock_gating()
3632 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_3d_clock_gating()
3673 def = data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_update_coarse_grain_clock_gating()
3682 WREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE, data); in gfx_v9_0_update_coarse_grain_clock_gating()
3817 data = RREG32_SOC15(GC, 0, mmRLC_CGTT_MGCG_OVERRIDE); in gfx_v9_0_get_clockgating_state()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1135 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3100 macro
HDgfx_7_0_d.h1280 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
HDgfx_7_2_d.h1293 #define mmRLC_CGTT_MGCG_OVERRIDE 0x3108 macro
HDgfx_8_0_d.h1391 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
HDgfx_8_1_d.h1393 #define mmRLC_CGTT_MGCG_OVERRIDE 0xec48 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5981 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
HDgc_9_2_1_offset.h6236 #define mmRLC_CGTT_MGCG_OVERRIDE … macro
HDgc_9_1_offset.h6260 #define mmRLC_CGTT_MGCG_OVERRIDE … macro