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Searched refs:mmRLC_CGCG_RAMP_CTRL (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h1134 #define mmRLC_CGCG_RAMP_CTRL 0x3102 macro
HDgfx_7_0_d.h1282 #define mmRLC_CGCG_RAMP_CTRL 0x310a macro
HDgfx_7_2_d.h1295 #define mmRLC_CGCG_RAMP_CTRL 0x310a macro
HDgfx_8_0_d.h1393 #define mmRLC_CGCG_RAMP_CTRL 0xec4a macro
HDgfx_8_1_d.h1395 #define mmRLC_CGCG_RAMP_CTRL 0xec4a macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h5985 #define mmRLC_CGCG_RAMP_CTRL … macro
HDgc_9_2_1_offset.h6240 #define mmRLC_CGCG_RAMP_CTRL … macro
HDgc_9_1_offset.h6264 #define mmRLC_CGCG_RAMP_CTRL … macro