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Searched refs:mmPA_SC_FIFO_SIZE (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h969 #define mmPA_SC_FIFO_SIZE 0x22F3 macro
HDgfx_7_0_d.h1094 #define mmPA_SC_FIFO_SIZE 0x22f3 macro
HDgfx_7_2_d.h1107 #define mmPA_SC_FIFO_SIZE 0x22f3 macro
HDgfx_8_0_d.h1189 #define mmPA_SC_FIFO_SIZE 0x22f3 macro
HDgfx_8_1_d.h1192 #define mmPA_SC_FIFO_SIZE 0x22f3 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h364 #define mmPA_SC_FIFO_SIZE … macro
HDgc_9_2_1_offset.h354 #define mmPA_SC_FIFO_SIZE … macro
HDgc_9_1_offset.h358 #define mmPA_SC_FIFO_SIZE … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgfx_v8_0.c3918 WREG32(mmPA_SC_FIFO_SIZE, in gfx_v8_0_gpu_init()