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Searched refs:mmPA_CL_UCP_4_Y (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h830 #define mmPA_CL_UCP_4_Y 0xA180 macro
HDgfx_7_0_d.h941 #define mmPA_CL_UCP_4_Y 0xa180 macro
HDgfx_7_2_d.h954 #define mmPA_CL_UCP_4_Y 0xa180 macro
HDgfx_8_0_d.h1036 #define mmPA_CL_UCP_4_Y 0xa180 macro
HDgfx_8_1_d.h1036 #define mmPA_CL_UCP_4_Y 0xa180 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h3785 #define mmPA_CL_UCP_4_Y … macro
HDgc_9_2_1_offset.h4022 #define mmPA_CL_UCP_4_Y … macro
HDgc_9_1_offset.h4072 #define mmPA_CL_UCP_4_Y … macro