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Searched refs:mmMC_VM_AGP_TOP (Results 1 – 15 of 15) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
HDgmc_7_0_d.h242 #define mmMC_VM_AGP_TOP 0x80a macro
HDgmc_8_2_d.h279 #define mmMC_VM_AGP_TOP 0x80a macro
HDgmc_6_0_d.h1022 #define mmMC_VM_AGP_TOP 0x080A macro
HDgmc_7_1_d.h273 #define mmMC_VM_AGP_TOP 0x80a macro
HDgmc_8_1_d.h282 #define mmMC_VM_AGP_TOP 0x80a macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgfxhub_v1_0.c76 WREG32_SOC15(GC, 0, mmMC_VM_AGP_TOP, 0); in gfxhub_v1_0_init_system_aperture_regs()
HDmmhub_v1_0.c87 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, 0); in mmhub_v1_0_init_system_aperture_regs()
HDgmc_v7_0.c293 WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); in gmc_v7_0_mc_program()
HDgmc_v8_0.c495 WREG32(mmMC_VM_AGP_TOP, 0x0FFFFFFF); in gmc_v8_0_mc_program()
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
HDmmhub_9_1_offset.h1968 #define mmMC_VM_AGP_TOP … macro
HDmmhub_1_0_offset.h1936 #define mmMC_VM_AGP_TOP … macro
HDmmhub_9_3_0_offset.h1960 #define mmMC_VM_AGP_TOP … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h1658 #define mmMC_VM_AGP_TOP … macro
HDgc_9_2_1_offset.h1644 #define mmMC_VM_AGP_TOP … macro
HDgc_9_1_offset.h1702 #define mmMC_VM_AGP_TOP … macro