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Searched refs:mmGDS_GWS_VMID1 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h2250 #define mmGDS_GWS_VMID1 0x3321 macro
HDgfx_7_2_d.h2272 #define mmGDS_GWS_VMID1 0x3321 macro
HDgfx_8_0_d.h2470 #define mmGDS_GWS_VMID1 0x3321 macro
HDgfx_8_1_d.h2449 #define mmGDS_GWS_VMID1 0x3321 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h3047 #define mmGDS_GWS_VMID1 … macro
HDgc_9_2_1_offset.h3284 #define mmGDS_GWS_VMID1 … macro
HDgc_9_1_offset.h3334 #define mmGDS_GWS_VMID1 … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgfx_v8_0.c176 {mmGDS_VMID1_BASE, mmGDS_VMID1_SIZE, mmGDS_GWS_VMID1, mmGDS_OA_VMID1},