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Searched refs:mmCP_ME_PRGRM_CNTR_START (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h296 #define mmCP_ME_PRGRM_CNTR_START 0x30a5 macro
HDgfx_7_2_d.h298 #define mmCP_ME_PRGRM_CNTR_START 0x30a5 macro
HDgfx_8_0_d.h329 #define mmCP_ME_PRGRM_CNTR_START 0x30a5 macro
HDgfx_8_1_d.h329 #define mmCP_ME_PRGRM_CNTR_START 0x30a5 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2519 #define mmCP_ME_PRGRM_CNTR_START … macro
HDgc_9_2_1_offset.h2762 #define mmCP_ME_PRGRM_CNTR_START … macro
HDgc_9_1_offset.h2828 #define mmCP_ME_PRGRM_CNTR_START … macro