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Searched refs:mmCP_ME2_PIPE3_PRIORITY (Results 1 – 7 of 7) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h293 #define mmCP_ME2_PIPE3_PRIORITY 0x30a2 macro
HDgfx_7_2_d.h295 #define mmCP_ME2_PIPE3_PRIORITY 0x30a2 macro
HDgfx_8_0_d.h326 #define mmCP_ME2_PIPE3_PRIORITY 0x30a2 macro
HDgfx_8_1_d.h326 #define mmCP_ME2_PIPE3_PRIORITY 0x30a2 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2513 #define mmCP_ME2_PIPE3_PRIORITY … macro
HDgc_9_2_1_offset.h2756 #define mmCP_ME2_PIPE3_PRIORITY … macro
HDgc_9_1_offset.h2822 #define mmCP_ME2_PIPE3_PRIORITY … macro