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Searched refs:mmCP_INT_CNTL_RING1 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h439 #define mmCP_INT_CNTL_RING1 0x306B macro
HDgfx_7_0_d.h223 #define mmCP_INT_CNTL_RING1 0x306b macro
HDgfx_7_2_d.h223 #define mmCP_INT_CNTL_RING1 0x306b macro
HDgfx_8_0_d.h247 #define mmCP_INT_CNTL_RING1 0x306b macro
HDgfx_8_1_d.h248 #define mmCP_INT_CNTL_RING1 0x306b macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2428 #define mmCP_INT_CNTL_RING1 … macro
HDgc_9_2_1_offset.h2680 #define mmCP_INT_CNTL_RING1 … macro
HDgc_9_1_offset.h2742 #define mmCP_INT_CNTL_RING1 … macro