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Searched refs:mmCP_HQD_HQ_STATUS1 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h668 #define mmCP_HQD_HQ_STATUS1 0x3268 macro
HDgfx_8_1_d.h668 #define mmCP_HQD_HQ_STATUS1 0x3268 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2831 #define mmCP_HQD_HQ_STATUS1 … macro
HDgc_9_2_1_offset.h3072 #define mmCP_HQD_HQ_STATUS1 … macro
HDgc_9_1_offset.h3116 #define mmCP_HQD_HQ_STATUS1 … macro