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Searched refs:mmCP_HQD_EOP_BASE_ADDR_HI (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
HDgfx_8_1_d.h671 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2837 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
HDgc_9_2_1_offset.h3078 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
HDgc_9_1_offset.h3122 #define mmCP_HQD_EOP_BASE_ADDR_HI … macro
/dragonfly/sys/dev/drm/amd/amdgpu/
HDgfx_v9_0.c2835 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI, in gfx_v9_0_kiq_init_register()