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Searched refs:mmCP_HPD_STATUS0 (Results 1 – 5 of 5) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h629 #define mmCP_HPD_STATUS0 0x3241 macro
HDgfx_8_1_d.h629 #define mmCP_HPD_STATUS0 0x3241 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2749 #define mmCP_HPD_STATUS0 … macro
HDgc_9_2_1_offset.h2990 #define mmCP_HPD_STATUS0 … macro
HDgc_9_1_offset.h3034 #define mmCP_HPD_STATUS0 … macro