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Searched refs:mmCP_DFY_ADDR_LO (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/smumgr/
HDsmu7_smumgr.c563 cgs_write_register(hwmgr->device, mmCP_DFY_ADDR_LO, section->dfy_addr_lo); in execute_pwr_dfy_table()
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h178 #define mmCP_DFY_ADDR_LO 0x3023 macro
HDgfx_7_2_d.h178 #define mmCP_DFY_ADDR_LO 0x3023 macro
HDgfx_8_0_d.h200 #define mmCP_DFY_ADDR_LO 0x3023 macro
HDgfx_8_1_d.h200 #define mmCP_DFY_ADDR_LO 0x3023 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h2262 #define mmCP_DFY_ADDR_LO … macro
HDgc_9_2_1_offset.h2514 #define mmCP_DFY_ADDR_LO … macro
HDgc_9_1_offset.h2576 #define mmCP_DFY_ADDR_LO … macro