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Searched refs:mmCGTS_CU7_LDS_SQ_CTRL_REG (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
HDmxgpu_vi.c207 mmCGTS_CU7_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
HDgfx_v8_0.c294 mmCGTS_CU7_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
664 mmCGTS_CU7_LDS_SQ_CTRL_REG, 0xffffffff, 0x00030002,
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h1521 #define mmCGTS_CU7_LDS_SQ_CTRL_REG 0xf02c macro
HDgfx_7_2_d.h1542 #define mmCGTS_CU7_LDS_SQ_CTRL_REG 0xf02c macro
HDgfx_8_0_d.h1735 #define mmCGTS_CU7_LDS_SQ_CTRL_REG 0xf02c macro
HDgfx_8_1_d.h1703 #define mmCGTS_CU7_LDS_SQ_CTRL_REG 0xf02c macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h6323 #define mmCGTS_CU7_LDS_SQ_CTRL_REG … macro
HDgc_9_2_1_offset.h6614 #define mmCGTS_CU7_LDS_SQ_CTRL_REG … macro
HDgc_9_1_offset.h6602 #define mmCGTS_CU7_LDS_SQ_CTRL_REG … macro