Searched refs:mmCGTS_CU3_SP0_CTRL_REG (Results 1 – 9 of 9) sorted by relevance
| /dragonfly/sys/dev/drm/amd/amdgpu/ |
| HD | mxgpu_vi.c | 186 mmCGTS_CU3_SP0_CTRL_REG, 0xffffffff, 0x00010000,
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| HD | gfx_v8_0.c | 273 mmCGTS_CU3_SP0_CTRL_REG, 0xffffffff, 0x00010000,
547 mmCGTS_CU3_SP0_CTRL_REG, 0xffffffff, 0x00010000,
643 mmCGTS_CU3_SP0_CTRL_REG, 0xffffffff, 0x00010000,
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gca/ |
| HD | gfx_7_0_d.h | 1500 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017 macro
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| HD | gfx_7_2_d.h | 1521 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017 macro
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| HD | gfx_8_0_d.h | 1714 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017 macro
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| HD | gfx_8_1_d.h | 1682 #define mmCGTS_CU3_SP0_CTRL_REG 0xf017 macro
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| /dragonfly/sys/dev/drm/amd/include/asic_reg/gc/ |
| HD | gc_9_0_offset.h | 6281 #define mmCGTS_CU3_SP0_CTRL_REG … macro
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| HD | gc_9_2_1_offset.h | 6572 #define mmCGTS_CU3_SP0_CTRL_REG … macro
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| HD | gc_9_1_offset.h | 6560 #define mmCGTS_CU3_SP0_CTRL_REG … macro
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