Home
last modified time | relevance | path

Searched refs:mmATC_L2_CNTL (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gmc/
HDgmc_7_0_d.h494 #define mmATC_L2_CNTL 0xcd5 macro
HDgmc_8_2_d.h541 #define mmATC_L2_CNTL 0xcd5 macro
HDgmc_6_0_d.h565 #define mmATC_L2_CNTL 0x0CD5 macro
HDgmc_7_1_d.h526 #define mmATC_L2_CNTL 0xcd5 macro
HDgmc_8_1_d.h539 #define mmATC_L2_CNTL 0xcd5 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/mmhub/
HDmmhub_9_1_offset.h1270 #define mmATC_L2_CNTL … macro
HDmmhub_1_0_offset.h1238 #define mmATC_L2_CNTL … macro
HDmmhub_9_3_0_offset.h1254 #define mmATC_L2_CNTL … macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h1116 #define mmATC_L2_CNTL … macro
HDgc_9_2_1_offset.h1098 #define mmATC_L2_CNTL … macro
HDgc_9_1_offset.h1160 #define mmATC_L2_CNTL … macro