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Searched refs:ixSQ_WAVE_TTMP10 (Results 1 – 8 of 8) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_d.h96 #define ixSQ_WAVE_TTMP10 0x027A macro
HDgfx_7_0_d.h1935 #define ixSQ_WAVE_TTMP10 0x27a macro
HDgfx_7_2_d.h1956 #define ixSQ_WAVE_TTMP10 0x27a macro
HDgfx_8_0_d.h2155 #define ixSQ_WAVE_TTMP10 0x27a macro
HDgfx_8_1_d.h2123 #define ixSQ_WAVE_TTMP10 0x27a macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h7058 #define ixSQ_WAVE_TTMP10 … macro
HDgc_9_2_1_offset.h7362 #define ixSQ_WAVE_TTMP10 … macro
HDgc_9_1_offset.h7323 #define ixSQ_WAVE_TTMP10 … macro