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Searched refs:ixDIDT_TD_CTRL1 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
HDsmu7_powertune.c161 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_TD…
162 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_TD…
303 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_TD…
304 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_TD…
445 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_TD…
446 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_TD…
589 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_TD…
590 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_TD…
773 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_TD…
774 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_TD…
HDvega10_powertune.c161 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MIN_POWER_MASK, DIDT_T…
162 …{ ixDIDT_TD_CTRL1, DIDT_TD_CTRL1__MAX_POWER_MASK, DIDT_T…
/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_7_0_d.h2520 #define ixDIDT_TD_CTRL1 0x41 macro
HDgfx_7_2_d.h2545 #define ixDIDT_TD_CTRL1 0x41 macro
HDgfx_8_0_d.h2792 #define ixDIDT_TD_CTRL1 0x41 macro
HDgfx_8_1_d.h2770 #define ixDIDT_TD_CTRL1 0x41 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h7131 #define ixDIDT_TD_CTRL1 … macro
HDgc_9_2_1_offset.h7491 #define ixDIDT_TD_CTRL1 … macro
HDgc_9_1_offset.h7395 #define ixDIDT_TD_CTRL1 … macro