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Searched refs:ixDIDT_DBR_CTRL0 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_8_0_d.h2805 #define ixDIDT_DBR_CTRL0 0x80 macro
HDgfx_8_1_d.h2783 #define ixDIDT_DBR_CTRL0 0x80 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_offset.h7184 #define ixDIDT_DBR_CTRL0 … macro
HDgc_9_1_offset.h7446 #define ixDIDT_DBR_CTRL0 … macro