Searched refs:dpll (Results 1 – 9 of 9) sorted by relevance
| /dragonfly/sys/dev/drm/i915/ |
| HD | intel_display.c | 508 static int pnv_calc_dpll_params(int refclk, struct dpll *clock) in pnv_calc_dpll_params()
520 static uint32_t i9xx_dpll_compute_m(struct dpll *dpll) in i9xx_dpll_compute_m() argument
522 return 5 * (dpll->m1 + 2) + (dpll->m2 + 2); in i9xx_dpll_compute_m()
525 static int i9xx_calc_dpll_params(int refclk, struct dpll *clock) in i9xx_calc_dpll_params()
537 static int vlv_calc_dpll_params(int refclk, struct dpll *clock) in vlv_calc_dpll_params()
549 int chv_calc_dpll_params(int refclk, struct dpll *clock) in chv_calc_dpll_params()
570 const struct dpll *clock) in intel_PLL_is_valid()
643 int target, int refclk, struct dpll *match_clock, in i9xx_find_best_dpll()
644 struct dpll *best_clock) in i9xx_find_best_dpll()
647 struct dpll clock; in i9xx_find_best_dpll()
[all …]
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| HD | intel_dpll_mgr.h | 111 uint32_t dpll; member
277 void intel_release_shared_dpll(struct intel_shared_dpll *dpll,
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| HD | intel_dvo.c | 444 uint32_t dpll[I915_MAX_PIPES]; in intel_dvo_init() local
477 dpll[pipe] = I915_READ(DPLL(pipe)); in intel_dvo_init()
478 I915_WRITE(DPLL(pipe), dpll[pipe] | DPLL_DVO_2X_MODE); in intel_dvo_init()
485 I915_WRITE(DPLL(pipe), dpll[pipe]); in intel_dvo_init()
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| HD | intel_drv.h | 344 struct dpll { struct
700 struct dpll dpll; member
1437 const struct dpll *dpll);
1476 struct dpll *best_clock);
1477 int chv_calc_dpll_params(int refclk, struct dpll *pll_clock);
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| HD | intel_dpll_mgr.c | 350 hw_state->dpll = val; in ibx_pch_dpll_get_hw_state()
385 I915_WRITE(PCH_DPLL(pll->id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
396 I915_WRITE(PCH_DPLL(pll->id), pll->state.hw_state.dpll); in ibx_pch_dpll_enable()
453 hw_state->dpll, in ibx_dump_hw_state()
1674 struct dpll best_clock; in bxt_ddi_hdmi_pll_dividers()
2500 void intel_release_shared_dpll(struct intel_shared_dpll *dpll, in intel_release_shared_dpll() argument
2507 shared_dpll_state[dpll->id].crtc_mask &= ~(1 << crtc->pipe); in intel_release_shared_dpll()
2528 hw_state->dpll, in intel_dpll_dump_hw_state()
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| HD | intel_dp.c | 55 struct dpll dpll; member
510 &chv_dpll[0].dpll : &vlv_dpll[0].dpll)) { in vlv_power_sequencer_kick()
1507 pipe_config->dpll = divisor[i].dpll; in intel_dp_set_clock()
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| HD | intel_sdvo.c | 1096 struct dpll *clock = &pipe_config->dpll; in i9xx_adjust_sdvo_tv_clock()
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| HD | intel_ddi.c | 1456 struct dpll clock; in bxt_calc_pll_link()
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| HD | i915_drv.h | 694 struct dpll;
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