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Searched refs:clocks (Results 1 – 25 of 44) sorted by relevance

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/dragonfly/sys/dev/drm/amd/powerplay/
HDamd_powerplay.c999 struct amd_pp_clock_info *clocks) in pp_get_current_clocks() argument
1027 clocks->min_engine_clock = hw_clocks.min_eng_clk; in pp_get_current_clocks()
1028 clocks->max_engine_clock = hw_clocks.max_eng_clk; in pp_get_current_clocks()
1029 clocks->min_memory_clock = hw_clocks.min_mem_clk; in pp_get_current_clocks()
1030 clocks->max_memory_clock = hw_clocks.max_mem_clk; in pp_get_current_clocks()
1031 clocks->min_bus_bandwidth = hw_clocks.min_bus_bandwidth; in pp_get_current_clocks()
1032 clocks->max_bus_bandwidth = hw_clocks.max_bus_bandwidth; in pp_get_current_clocks()
1034 clocks->max_engine_clock_in_sr = hw_clocks.max_eng_clk; in pp_get_current_clocks()
1035 clocks->min_engine_clock_in_sr = hw_clocks.min_eng_clk; in pp_get_current_clocks()
1038 clocks->max_clocks_state = PP_DAL_POWERLEVEL_7; in pp_get_current_clocks()
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/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
HDsmu10_hwmgr.c201 struct PP_Clocks clocks = {0}; in smu10_set_clock_limit() local
204 clocks.dcefClock = hwmgr->display_config->min_dcef_set_clk; in smu10_set_clock_limit()
206 clock_req.clock_freq_in_khz = clocks.dcefClock * 10; in smu10_set_clock_limit()
956 struct pp_clock_levels_with_latency *clocks) in smu10_get_clock_by_type_with_latency() argument
995 clocks->num_levels = 0; in smu10_get_clock_by_type_with_latency()
998 clocks->data[clocks->num_levels].clocks_in_khz = in smu10_get_clock_by_type_with_latency()
1000 clocks->data[clocks->num_levels].latency_in_us = latency_required ? in smu10_get_clock_by_type_with_latency()
1004 clocks->num_levels++; in smu10_get_clock_by_type_with_latency()
1013 struct pp_clock_levels_with_voltage *clocks) in smu10_get_clock_by_type_with_voltage() argument
1049 clocks->num_levels = 0; in smu10_get_clock_by_type_with_voltage()
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HDhardwaremanager.c402 …et_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks) in phm_get_clock_by_type() argument
409 return hwmgr->hwmgr_func->get_clock_by_type(hwmgr, type, clocks); in phm_get_clock_by_type()
415 struct pp_clock_levels_with_latency *clocks) in phm_get_clock_by_type_with_latency() argument
422 return hwmgr->hwmgr_func->get_clock_by_type_with_latency(hwmgr, type, clocks); in phm_get_clock_by_type_with_latency()
428 struct pp_clock_levels_with_voltage *clocks) in phm_get_clock_by_type_with_voltage() argument
435 return hwmgr->hwmgr_func->get_clock_by_type_with_voltage(hwmgr, type, clocks); in phm_get_clock_by_type_with_voltage()
462 int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks) in phm_get_max_high_clocks() argument
469 return hwmgr->hwmgr_func->get_max_high_clocks(hwmgr, clocks); in phm_get_max_high_clocks()
HDvega12_hwmgr.c1625 struct pp_clock_levels_with_latency *clocks) in vega12_get_sclks() argument
1640 clocks->data[i].clocks_in_khz = in vega12_get_sclks()
1643 clocks->data[i].latency_in_us = 0; in vega12_get_sclks()
1646 clocks->num_levels = ucount; in vega12_get_sclks()
1658 struct pp_clock_levels_with_latency *clocks) in vega12_get_memclocks() argument
1672 clocks->data[i].clocks_in_khz = dpm_table->dpm_levels[i].value * 1000; in vega12_get_memclocks()
1674 clocks->data[i].latency_in_us = in vega12_get_memclocks()
1679 clocks->num_levels = data->mclk_latency_table.count = ucount; in vega12_get_memclocks()
1685 struct pp_clock_levels_with_latency *clocks) in vega12_get_dcefclocks() argument
1701 clocks->data[i].clocks_in_khz = in vega12_get_dcefclocks()
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HDsmu8_hwmgr.c1042 struct PP_Clocks clocks = {0, 0, 0, 0}; in smu8_apply_state_adjust_rules() local
1049 clocks.memoryClock = hwmgr->display_config->min_mem_set_clock != 0 ? in smu8_apply_state_adjust_rules()
1055 clocks.memoryClock = hwmgr->dyn_state.max_clock_voltage_on_ac.mclk; in smu8_apply_state_adjust_rules()
1057 … force_high = (clocks.memoryClock > data->sys_info.nbp_memory_clock[SMU8_NUM_NBPMEMORYCLOCK - 1]) in smu8_apply_state_adjust_rules()
1598 struct amd_pp_clocks *clocks) in smu8_get_clock_by_type() argument
1604 clocks->count = smu8_get_max_sclk_level(hwmgr); in smu8_get_clock_by_type()
1607 for (i = 0; i < clocks->count; i++) in smu8_get_clock_by_type()
1608 clocks->clock[i] = data->sys_info.display_clock[i] * 10; in smu8_get_clock_by_type()
1612 for (i = 0; i < clocks->count; i++) in smu8_get_clock_by_type()
1613 clocks->clock[i] = table->entries[i].clk * 10; in smu8_get_clock_by_type()
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HDvega10_hwmgr.c4083 struct pp_clock_levels_with_latency *clocks) in vega10_get_sclks() argument
4091 clocks->num_levels = 0; in vega10_get_sclks()
4094 clocks->data[clocks->num_levels].clocks_in_khz = in vega10_get_sclks()
4096 clocks->num_levels++; in vega10_get_sclks()
4103 struct pp_clock_levels_with_latency *clocks) in vega10_get_memclocks() argument
4116 clocks->data[j].clocks_in_khz = in vega10_get_memclocks()
4120 clocks->data[j].latency_in_us = in vega10_get_memclocks()
4125 clocks->num_levels = data->mclk_latency_table.count = j; in vega10_get_memclocks()
4129 struct pp_clock_levels_with_latency *clocks) in vega10_get_dcefclocks() argument
4138 clocks->data[i].clocks_in_khz = dep_table->entries[i].clk * 10; in vega10_get_dcefclocks()
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HDsmu7_hwmgr.c4637 static int smu7_get_sclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) in smu7_get_sclks() argument
4650 clocks->clock[i] = dep_sclk_table->entries[i].clk * 10; in smu7_get_sclks()
4651 clocks->count = dep_sclk_table->count; in smu7_get_sclks()
4655 clocks->clock[i] = sclk_table->entries[i].clk * 10; in smu7_get_sclks()
4656 clocks->count = sclk_table->count; in smu7_get_sclks()
4674 static int smu7_get_mclks(struct pp_hwmgr *hwmgr, struct amd_pp_clocks *clocks) in smu7_get_mclks() argument
4687 clocks->clock[i] = dep_mclk_table->entries[i].clk * 10; in smu7_get_mclks()
4688 clocks->latency[i] = smu7_get_mem_latency(hwmgr, in smu7_get_mclks()
4691 clocks->count = dep_mclk_table->count; in smu7_get_mclks()
4695 clocks->clock[i] = mclk_table->entries[i].clk * 10; in smu7_get_mclks()
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/dragonfly/sys/dev/drm/amd/include/
HDkgd_pp_interface.h255 struct amd_pp_clock_info *clocks);
258 struct amd_pp_clocks *clocks);
261 struct pp_clock_levels_with_latency *clocks);
264 struct pp_clock_levels_with_voltage *clocks);
270 struct amd_pp_simple_clock_info *clocks);
/dragonfly/libexec/telnetd/
HDdefs.h133 #define settimer(x) (clocks.x = ++clocks.system)
134 #define sequenceIs(x,y) (clocks.x < clocks.y)
HDext.h196 } clocks;
/dragonfly/usr.bin/telnet/
HDdefines.h33 #define settimer(x) clocks.x = clocks.system++
HDterminal.c187 if (dontlecho && (clocks.echotoggle > clocks.modenegotiated)) { in getconnmode()
HDtypes.h48 extern Clocks clocks;
/dragonfly/sys/dev/drm/amd/powerplay/inc/
HDhardwaremanager.h449 …t_clock_by_type(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks);
453 struct pp_clock_levels_with_latency *clocks);
456 struct pp_clock_levels_with_voltage *clocks);
462 extern int phm_get_max_high_clocks(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);
HDhwmgr.h290 …_clock_by_type)(struct pp_hwmgr *hwmgr, enum amd_pp_clock_type type, struct amd_pp_clocks *clocks);
293 struct pp_clock_levels_with_latency *clocks);
296 struct pp_clock_levels_with_voltage *clocks);
300 … int (*get_max_high_clocks)(struct pp_hwmgr *hwmgr, struct amd_pp_simple_clock_info *clocks);
/dragonfly/usr.bin/calendar/calendars/
HDcalendar.canada18 03/SunSecond Daylight Saving Time begins; clocks move forward (2nd Sunday of March)
33 11/SunFirst Daylight Saving Time ends; clocks move back (1st Sunday in November)
HDcalendar.newzealand17 04/SunFirst Daylight Saving Time ends; clocks move back (first Sunday of April)
22 09/SunLast Daylight Saving Time starts; clocks move forward (last Sunday in September)
HDcalendar.uk19 03/SunLast Daylight Saving Time begins; clocks move forward (last Sunday of March)
35 10/SunLast Daylight Saving Time ends; clocks move back (last Sunday in October)
HDcalendar.usholiday21 03/SunSecond Daylight Saving Time begins in USA; clocks move forward (2nd Sunday of March)
38 11/SunFirst Daylight Saving Time ends in USA; clocks move back (1st Sunday of November)
/dragonfly/sys/dev/drm/radeon/
HDbtc_dpm.c1208 static u32 btc_find_valid_clock(struct radeon_clock_array *clocks, in btc_find_valid_clock() argument
1213 if ((clocks == NULL) || (clocks->count == 0)) in btc_find_valid_clock()
1216 for (i = 0; i < clocks->count; i++) { in btc_find_valid_clock()
1217 if (clocks->values[i] >= requested_clock) in btc_find_valid_clock()
1218 … return (clocks->values[i] < max_clock) ? clocks->values[i] : max_clock; in btc_find_valid_clock()
1221 return (clocks->values[clocks->count - 1] < max_clock) ? in btc_find_valid_clock()
1222 clocks->values[clocks->count - 1] : max_clock; in btc_find_valid_clock()
/dragonfly/share/man/man7/
HDMakefile6 clocks.7 \
/dragonfly/share/zoneinfo/
HDsouthamerica221 # The following eight (8) provinces pulled clocks back to UTC-04:00 at
245 # Fuego set its clocks back at 2004-05-30 00:00.
271 # (It is imminent in San Luis clocks one hour delay)
304 # (that is, Monday 21st at 0:00 is the time the clocks were delayed back
339 # inhabitants) will have to turn back one hour their clocks
1093 # standardized on 109W22 in 1890; assume this didn't change the clocks.
1159 # Law Number 8,522, promulgated 1946-08-27, reunified Chilean clocks at their
1202 # Chile's clocks will go back an hour this year on the 7th of May instead
1214 # a. Saturday April 28, 2012, clocks should go back 60 minutes; that is, at
1217 # b. Saturday, September 1, 2012, clocks should go forward 60 minutes; that is,
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HDasia289 # on April 11, 1919, newspaper in Shanghai said clocks in Shanghai will spring
299 # the clocks were all set one hour ahead of sun time. Though the scheme was
343 # unchange, and there were different clocks that use different time standard
381 # department will also change their clocks, unlike before.
445 # (To establish summer time from 1986. On 4 May, set the clocks ahead one hour
446 # at 2 am. On 14 September, set the clocks backward one hour at 2 am.)
602 # others moving their clocks ahead.)
758 # clocks moving forward one hour until October 1, when they would be put back
1145 # http://cyprus-mail.com/2016/09/08/two-time-zones-cyprus-turkey-will-not-turn-clocks-back-next-mon…
1183 # Today's _Economist_ (p 60) reports that Georgia moved its clocks forward
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HDantarctica264 # solar noon. So the Vostok time might have been whatever the clocks
329 # All the electric clocks are usually wrong.
331 # makes all of the clocks run fast. So every couple of days,
HDeurope141 # clocks in Britain were set to GMT (though some, like the great clock
171 # that proposed advancing clocks 20 minutes on each of four Sundays in April,
272 # Standard time was not changed until 1968-10-27 (the clocks didn't change).
719 # says that every year clocks were to be moved forward on last Sunday
853 # 1992-03-25 No. 157) ... says clocks were to be moved forward at 2:00
892 # Europe and forced the inhabitants to set their watches and public clocks
1288 # 00:00), clocks were moved one hour forward. The newspaper
1290 # On Oct 4 1942, clocks were moved at 1:00 one hour backwards.
1337 # stations: all the publicly visible clocks stopped at midnight railway time
1344 # That "all French clocks stopped" for 00:09:21 is a misreading of French
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