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Searched refs:acr (Results 1 – 10 of 10) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
HDdce3_1_afmt.c179 const struct radeon_hdmi_acr *acr);
181 const struct radeon_hdmi_acr *acr) in dce3_2_hdmi_update_acr() argument
191 HDMI0_ACR_CTS_32(acr->cts_32khz), in dce3_2_hdmi_update_acr()
194 HDMI0_ACR_N_32(acr->n_32khz), in dce3_2_hdmi_update_acr()
198 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in dce3_2_hdmi_update_acr()
201 HDMI0_ACR_N_44(acr->n_44_1khz), in dce3_2_hdmi_update_acr()
205 HDMI0_ACR_CTS_48(acr->cts_48khz), in dce3_2_hdmi_update_acr()
208 HDMI0_ACR_N_48(acr->n_48khz), in dce3_2_hdmi_update_acr()
HDr600_hdmi.c178 const struct radeon_hdmi_acr *acr);
180 const struct radeon_hdmi_acr *acr) in r600_hdmi_update_acr() argument
195 HDMI0_ACR_CTS_32(acr->cts_32khz), in r600_hdmi_update_acr()
198 HDMI0_ACR_N_32(acr->n_32khz), in r600_hdmi_update_acr()
202 HDMI0_ACR_CTS_44(acr->cts_44_1khz), in r600_hdmi_update_acr()
205 HDMI0_ACR_N_44(acr->n_44_1khz), in r600_hdmi_update_acr()
209 HDMI0_ACR_CTS_48(acr->cts_48khz), in r600_hdmi_update_acr()
212 HDMI0_ACR_N_48(acr->n_48khz), in r600_hdmi_update_acr()
HDevergreen_hdmi.c71 const struct radeon_hdmi_acr *acr);
73 const struct radeon_hdmi_acr *acr) in evergreen_hdmi_update_acr() argument
92 WREG32(HDMI_ACR_32_0 + offset, HDMI_ACR_CTS_32(acr->cts_32khz)); in evergreen_hdmi_update_acr()
93 WREG32(HDMI_ACR_32_1 + offset, acr->n_32khz); in evergreen_hdmi_update_acr()
95 WREG32(HDMI_ACR_44_0 + offset, HDMI_ACR_CTS_44(acr->cts_44_1khz)); in evergreen_hdmi_update_acr()
96 WREG32(HDMI_ACR_44_1 + offset, acr->n_44_1khz); in evergreen_hdmi_update_acr()
98 WREG32(HDMI_ACR_48_0 + offset, HDMI_ACR_CTS_48(acr->cts_48khz)); in evergreen_hdmi_update_acr()
99 WREG32(HDMI_ACR_48_1 + offset, acr->n_48khz); in evergreen_hdmi_update_acr()
HDradeon_audio.c89 const struct radeon_hdmi_acr *acr);
91 const struct radeon_hdmi_acr *acr);
93 const struct radeon_hdmi_acr *acr);
634 const struct radeon_hdmi_acr *acr = radeon_audio_acr(clock); in radeon_audio_update_acr() local
642 radeon_encoder->audio->update_acr(encoder, dig->afmt->offset, acr); in radeon_audio_update_acr()
HDradeon_audio.h57 const struct radeon_hdmi_acr *acr);
/dragonfly/sys/dev/drm/amd/amdgpu/
HDdce_v10_0.c1461 struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); in dce_v10_0_afmt_update_ACR() local
1467 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v10_0_afmt_update_ACR()
1470 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v10_0_afmt_update_ACR()
1474 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v10_0_afmt_update_ACR()
1477 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v10_0_afmt_update_ACR()
1481 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v10_0_afmt_update_ACR()
1484 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v10_0_afmt_update_ACR()
HDdce_v11_0.c1503 struct amdgpu_afmt_acr acr = amdgpu_afmt_acr(clock); in dce_v11_0_afmt_update_ACR() local
1509 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_0, HDMI_ACR_CTS_32, acr.cts_32khz); in dce_v11_0_afmt_update_ACR()
1512 tmp = REG_SET_FIELD(tmp, HDMI_ACR_32_1, HDMI_ACR_N_32, acr.n_32khz); in dce_v11_0_afmt_update_ACR()
1516 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_0, HDMI_ACR_CTS_44, acr.cts_44_1khz); in dce_v11_0_afmt_update_ACR()
1519 tmp = REG_SET_FIELD(tmp, HDMI_ACR_44_1, HDMI_ACR_N_44, acr.n_44_1khz); in dce_v11_0_afmt_update_ACR()
1523 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_0, HDMI_ACR_CTS_48, acr.cts_48khz); in dce_v11_0_afmt_update_ACR()
1526 tmp = REG_SET_FIELD(tmp, HDMI_ACR_48_1, HDMI_ACR_N_48, acr.n_48khz); in dce_v11_0_afmt_update_ACR()
/dragonfly/etc/
HDservices209 acr-nema 104/tcp #ACR-NEMA Digital Imag. & Comm. 300
210 acr-nema 104/udp #ACR-NEMA Digital Imag. & Comm. 300
/dragonfly/contrib/gdb-7/
HDREADME.DELETED635 gdb/features/s390-acr.xml
/dragonfly/contrib/file/magic/Magdir/
HDimages1276 # XnView mention also "dc3" and "acr" as file name extension