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Searched refs:WR4 (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/disk/sdhci/
HDsdhci.c77 #define WR4(slot, off, val) SDHCI_WRITE_4((slot)->bus, (slot), (off), (val)) macro
247 WR4(slot, SDHCI_INT_ENABLE, slot->intmask); in sdhci_init()
248 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask); in sdhci_init()
447 WR4(slot, SDHCI_BUFFER, data); in sdhci_write_block_pio()
461 WR4(slot, SDHCI_BUFFER, data); in sdhci_write_block_pio()
961 WR4(slot, SDHCI_SIGNAL_ENABLE, 0); in sdhci_generic_update_ios()
1189 WR4(slot, SDHCI_SIGNAL_ENABLE, in sdhci_start_command()
1193 WR4(slot, SDHCI_ARGUMENT, cmd->arg); in sdhci_start_command()
1222 WR4(slot, SDHCI_SIGNAL_ENABLE, slot->intmask |= SDHCI_INT_RESPONSE); in sdhci_finish_command()
1343 WR4(slot, SDHCI_ADMA_ADDRESS_LOW, descmem->dmem_busaddr); in sdhci_start_data()
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/dragonfly/sys/dev/crypto/tpm/
HDtpm20.h166 WR4(struct tpm_sc *sc, bus_size_t off, uint32_t val) in WR4() function
175 WR4(sc, off, RD4(sc, off) & val); in AND4()
187 WR4(sc, off, RD4(sc, off) | val); in OR4()
HDtpm_crb.c294 WR4(sc, TPM_CRB_CTRL_CANCEL, TPM_CRB_CTRL_CANCEL_CMD); in tpmcrb_cancel_cmd()
302 WR4(sc, TPM_CRB_CTRL_CANCEL, TPM_CRB_CTRL_CANCEL_CLEAR); in tpmcrb_cancel_cmd()
334 WR4(sc, TPM_CRB_CTRL_CANCEL, TPM_CRB_CTRL_CANCEL_CLEAR); in tpmcrb_transmit()
372 WR4(sc, TPM_CRB_CTRL_START, TPM_CRB_CTRL_START_CMD); in tpmcrb_transmit()
HDtpm_tis.c224 WR4(sc, TPM_INT_ENABLE, irq_mask); in tpmtis_setup_intr()
243 WR4(sc, TPM_INT_STS, status); in tpmtis_intr_handler()
390 WR4(sc, TPM_STS, TPM_STS_CMD_RDY); in tpmtis_go_ready()
444 WR4(sc, TPM_STS, TPM_STS_CMD_START); in tpmtis_transmit()