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Searched refs:WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK (Results 1 – 4 of 4) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_10_0_sh_mask.h14564 #define WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK 0x10000 macro
HDdce_11_0_sh_mask.h14558 #define WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK 0x10000 macro
HDdce_11_2_sh_mask.h15176 #define WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK 0x4000 macro
HDdce_12_0_sh_mask.h4353 #define WB_EC_CONFIG__WBSCL_LB_MEM_PWR_DIS_MASK … macro