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Searched refs:SPLL_CNTL_MODE (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
HDrv6xxd.h27 #define SPLL_CNTL_MODE 0x60c macro
HDrv770d.h111 #define SPLL_CNTL_MODE 0x610 macro
HDsi.c4004 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
4006 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
4016 tmp = RREG32(SPLL_CNTL_MODE); in si_spll_powerdown()
4018 WREG32(SPLL_CNTL_MODE, tmp); in si_spll_powerdown()
7424 orig = data = RREG32(SPLL_CNTL_MODE); in si_program_aspm()
7427 WREG32(SPLL_CNTL_MODE, data); in si_program_aspm()
HDsid.h108 #define SPLL_CNTL_MODE 0x618 macro
HDrv6xx_dpm.c408 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC); in rv6xx_enable_engine_feedback_and_reference_sync()
HDrv770_dpm.c879 WREG32_P(SPLL_CNTL_MODE, SPLL_DIV_SYNC, ~SPLL_DIV_SYNC); in rv770_program_engine_speed_parameters()