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Searched refs:REG_SET_4 (Results 1 – 9 of 9) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_transform.c222 REG_SET_4(SCL_COEF_RAM_TAP_DATA, 0, in program_multi_taps_filter()
1230 REG_SET_4(REGAMMA_CNTLA_REGION_0_1, 0, in regamma_config_regions_and_segments()
1237 REG_SET_4(REGAMMA_CNTLA_REGION_2_3, 0, in regamma_config_regions_and_segments()
1244 REG_SET_4(REGAMMA_CNTLA_REGION_4_5, 0, in regamma_config_regions_and_segments()
1251 REG_SET_4(REGAMMA_CNTLA_REGION_6_7, 0, in regamma_config_regions_and_segments()
1258 REG_SET_4(REGAMMA_CNTLA_REGION_8_9, 0, in regamma_config_regions_and_segments()
1265 REG_SET_4(REGAMMA_CNTLA_REGION_10_11, 0, in regamma_config_regions_and_segments()
1272 REG_SET_4(REGAMMA_CNTLA_REGION_12_13, 0, in regamma_config_regions_and_segments()
1279 REG_SET_4(REGAMMA_CNTLA_REGION_14_15, 0, in regamma_config_regions_and_segments()
HDdce_stream_encoder.c108 REG_SET_4(AFMT_GENERIC_HDR, 0, in dce110_update_generic_info_packet()
487 REG_SET_4(DP_MSA_TIMING_PARAM3, 0, in dce110_stream_encoder_dp_set_stream_attribute()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_dpp_dscl.c278 REG_SET_4(SCL_COEF_RAM_TAP_DATA, 0, in dpp1_dscl_set_scaler_filter()
567 REG_SET_4(SCL_TAP_CONTROL, 0,
722 REG_SET_4(SCL_TAP_CONTROL, 0, in dpp1_dscl_set_scaler_manual_scale()
HDdcn10_stream_encoder.c96 REG_SET_4(AFMT_GENERIC_HDR, 0, in enc1_update_generic_info_packet()
444 REG_SET_4(DP_MSA_TIMING_PARAM3, 0, in enc1_stream_encoder_dp_set_stream_attribute()
HDdcn10_optc.c748 REG_SET_4(OTG_TRIGA_CNTL, 0, in optc1_enable_crtc_reset()
1111 REG_SET_4(OTG_TEST_PATTERN_CONTROL, 0, in optc1_set_test_pattern()
HDdcn10_cm_common.c115 REG_SET_4(reg_region_cur, 0, in cm_helper_program_xfer_func()
HDdcn10_hubp.c505 REG_SET_4(DCN_EXPANSION_MODE, 0, in hubp1_program_requestor()
/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce110/
HDi2c_hw_engine_dce110.c310 value = REG_SET_4(DC_I2C_DATA, 0, in process_transaction()
/dragonfly/sys/dev/drm/amd/display/dc/inc/
HDreg_helper.h78 #define REG_SET_4(reg, init_value, f1, v1, f2, v2, f3, v3, f4, v4) \ macro