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Searched refs:REG_SET_3 (Results 1 – 12 of 12) sorted by relevance

/dragonfly/sys/dev/drm/amd/display/dc/dce/
HDdce_ipp.c102 REG_SET_3(CUR_COLOR1, 0, in dce_ipp_cursor_set_attributes()
107 REG_SET_3(CUR_COLOR2, 0, in dce_ipp_cursor_set_attributes()
187 REG_SET_3(DC_LUT_CONTROL, 0, in dce_ipp_program_input_lut()
226 REG_SET_3(DEGAMMA_CONTROL, 0, in dce_ipp_set_degamma()
HDdce_abm.c262 REG_SET_3(DC_ABM1_HG_MISC_CTRL, 0, in dce_abm_init()
267 REG_SET_3(DC_ABM1_IPCSC_COEFF_SEL, 0, in dce_abm_init()
285 REG_SET_3(DC_ABM1_HGLS_REG_READ_PROGRESS, 0, in dce_abm_init()
HDdce_link_encoder.c170 REG_SET_3(DP_DPHY_SYM0, 0, in program_pattern_symbols()
178 REG_SET_3(DP_DPHY_SYM1, 0, in program_pattern_symbols()
HDdce_transform.c210 REG_SET_3(SCL_COEF_RAM_SELECT, 0, in program_multi_taps_filter()
/dragonfly/sys/dev/drm/amd/display/dc/dcn10/
HDdcn10_dpp_dscl.c265 REG_SET_3(SCL_COEF_RAM_TAP_SELECT, 0, in dpp1_dscl_set_scaler_filter()
551 REG_SET_3(DSCL_AUTOCAL, 0,
679 REG_SET_3(DSCL_AUTOCAL, 0, in dpp1_dscl_set_scaler_manual_scale()
HDdcn10_optc.c90 REG_SET_3(OTG_3D_STRUCTURE_CONTROL, 0, in optc1_disable_stereo()
525 REG_SET_3(OTG_BLACK_COLOR, 0, in optc1_program_blank_color()
703 REG_SET_3(OTG_TRIGA_CNTL, 0, in optc1_enable_reset_trigger()
712 REG_SET_3(OTG_TRIGA_CNTL, 0, in optc1_enable_reset_trigger()
HDdcn10_dpp.c322 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_cnv_setup()
328 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_cnv_setup()
HDdcn10_hubp.c637 REG_SET_3(DCN_SURF0_TTU_CNTL0, 0, in hubp1_program_deadline()
646 REG_SET_3(DCN_SURF1_TTU_CNTL0, 0, in hubp1_program_deadline()
655 REG_SET_3(DCN_CUR0_TTU_CNTL0, 0, in hubp1_program_deadline()
HDdcn10_link_encoder.c141 REG_SET_3(DP_DPHY_SYM0, 0, in program_pattern_symbols()
149 REG_SET_3(DP_DPHY_SYM1, 0, in program_pattern_symbols()
HDdcn10_dpp_cm.c737 REG_SET_3(FORMAT_CONTROL, 0, in dpp1_full_bypass()
/dragonfly/sys/dev/drm/amd/display/dc/i2caux/dce110/
HDi2c_hw_engine_dce110.c394 REG_SET_3(DC_I2C_DATA, 0, in process_channel_reply()
/dragonfly/sys/dev/drm/amd/display/dc/inc/
HDreg_helper.h72 #define REG_SET_3(reg, init_value, f1, v1, f2, v2, f3, v3) \ macro