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Searched refs:RB_BLKSZ (Results 1 – 15 of 15) sorted by relevance

/dragonfly/sys/dev/drm/amd/amdgpu/
HDuvd_v5_0.c397 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1); in uvd_v5_0_start()
HDuvd_v6_0.c828 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1); in uvd_v6_0_start()
HDvcn_v1_0.c735 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1); in vcn_v1_0_start()
HDuvd_v7_0.c1065 tmp = REG_SET_FIELD(tmp, UVD_RBC_RB_CNTL, RB_BLKSZ, 1); in uvd_v7_0_start()
HDgfx_v9_0.c2469 tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2); in gfx_v9_0_cp_gfx_resume()
HDgfx_v8_0.c4488 tmp = REG_SET_FIELD(tmp, CP_RB0_CNTL, RB_BLKSZ, rb_bufsz - 2); in gfx_v8_0_cp_gfx_resume()
/dragonfly/sys/dev/drm/radeon/
HDrv770d.h351 #define RB_BLKSZ(x) ((x) << 8) macro
HDnid.h486 #define RB_BLKSZ(x) ((x) << 8) macro
HDsid.h1248 #define RB_BLKSZ(x) ((x) << 8) macro
HDcikd.h1304 #define RB_BLKSZ(x) ((x) << 8) macro
HDrv770.c1098 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in rv770_cp_load_microcode()
HDevergreend.h478 #define RB_BLKSZ(x) ((x) << 8) macro
HDr600d.h197 #define RB_BLKSZ(x) ((x) << 8) macro
HDr600.c2667 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in r600_cp_load_microcode()
HDevergreen.c2960 RB_NO_UPDATE | RB_BLKSZ(15) | RB_BUFSZ(3)); in evergreen_cp_load_microcode()