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Searched refs:PPLL_VREG_CFG__pw_pc_dpll_cfg_2__SHIFT (Results 1 – 2 of 2) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/dce/
HDdce_11_2_sh_mask.h18355 #define PPLL_VREG_CFG__pw_pc_dpll_cfg_2__SHIFT 0x14 macro
HDdce_12_0_sh_mask.h336 #define PPLL_VREG_CFG__pw_pc_dpll_cfg_2__SHIFT … macro