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Searched refs:PORT_PLL_M2_MASK (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_dpll_mgr.c1467 temp &= ~PORT_PLL_M2_MASK; in bxt_ddi_pll_enable()
1599 hw_state->pll0 &= PORT_PLL_M2_MASK; in bxt_ddi_pll_get_hw_state()
HDintel_ddi.c1466 clock.m2 = (state->pll0 & PORT_PLL_M2_MASK) << 22; in bxt_calc_pll_link()
HDi915_reg.h1830 #define PORT_PLL_M2_MASK 0xFF macro