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Searched refs:PORT_CLK_SEL_WRPLL1 (Results 1 – 3 of 3) sorted by relevance

/dragonfly/sys/dev/drm/i915/
HDintel_ddi.c904 return PORT_CLK_SEL_WRPLL1; in hsw_pll_to_ddi_pll_sel()
1422 case PORT_CLK_SEL_WRPLL1: in hsw_ddi_clock_get()
HDi915_reg.h8467 #define PORT_CLK_SEL_WRPLL1 (4<<29) macro
HDintel_display.c8985 case PORT_CLK_SEL_WRPLL1: in haswell_get_ddi_pll()