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Searched refs:PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h6973 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x00000003 macro
HDgfx_7_2_sh_mask.h5742 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
HDgfx_8_1_sh_mask.h7064 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
HDgfx_8_0_sh_mask.h6530 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT 0x3 macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h16806 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro
HDgc_9_2_1_sh_mask.h18117 #define PA_SU_SC_MODE_CNTL__POLY_MODE__SHIFT … macro