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Searched refs:PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h6896 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK 0x000000ffL macro
HDgfx_7_2_sh_mask.h5791 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK 0x3ff macro
HDgfx_8_1_sh_mask.h7113 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK 0x3ff macro
HDgfx_8_0_sh_mask.h6579 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK 0x3ff macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h21365 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK … macro
HDgc_9_2_1_sh_mask.h22750 #define PA_SU_PERFCOUNTER1_SELECT__PERF_SEL_MASK … macro