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Searched refs:PA_CL_ENHANCE__ECO_SPARE0__SHIFT (Results 1 – 6 of 6) sorted by relevance

/dragonfly/sys/dev/drm/amd/include/asic_reg/gca/
HDgfx_6_0_sh_mask.h5609 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT 0x0000001f macro
HDgfx_7_2_sh_mask.h5684 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT 0x1f macro
HDgfx_8_1_sh_mask.h7006 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT 0x1f macro
HDgfx_8_0_sh_mask.h6472 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT 0x1f macro
/dragonfly/sys/dev/drm/amd/include/asic_reg/gc/
HDgc_9_0_sh_mask.h1545 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT … macro
HDgc_9_2_1_sh_mask.h1475 #define PA_CL_ENHANCE__ECO_SPARE0__SHIFT … macro