MC_SEQ_MISC0_GDDR5_SHIFT (reference) in projects: dragonfly

Searched refs:MC_SEQ_MISC0_GDDR5_SHIFT (Results 1 – 11 of 11) sorted by relevance

/dragonfly/sys/dev/drm/radeon/
H D	btcd.h	`120 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
H D	nid.h	`210 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro 791 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
H D	rv770d.h	`286 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
H D	sid.h	`558 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
H D	cikd.h	`683 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
H D	ni.c	`649 mem_type = (RREG32(MC_SEQ_MISC0) & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT; in ni_mc_load_microcode()`
H D	rv770_dpm.c	`1601 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in rv770_get_memory_type()`
H D	ci_dpm.c	`5129 if (((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT) == in ci_get_memory_type()`
H D	si_dpm.c	`3210 …ddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT)); in si_is_special_1gb_platform()`
/dragonfly/sys/dev/drm/amd/powerplay/hwmgr/
H D	smu7_hwmgr.c	`73 #define MC_SEQ_MISC0_GDDR5_SHIFT 28 macro`
/dragonfly/sys/dev/drm/amd/amdgpu/
H D	si_dpm.c	`3669 …ddr5 = (MC_SEQ_MISC0_GDDR5_VALUE == ((tmp & MC_SEQ_MISC0_GDDR5_MASK) >> MC_SEQ_MISC0_GDDR5_SHIFT)); in si_is_special_1gb_platform()`